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Titel
Trace-based Register Allocation in a JIT Compiler
AutorInnenEisl, Josef ; Grimmer, Matthias ; Simon, Doug ; Würthinger, Thomas ; Mössenböck, Hanspeter
Erschienen in
Proceedings of the 13th International Conference on Principles and Practices of Programming on the Java Platform: Virtual Machines, Languages, and Tools, 2016
Erschienen2016
SpracheEnglisch
DokumenttypAufsatz in einem Sammelwerk
Schlagwörter (DE)Trace Register Allocation / Register Allocation / Trace Compilation / Linear Scan / Just-in-Time Compilation / Virtual Machines
Schlagwörter (EN)Trace Register Allocation / Register Allocation / Trace Compilation / Linear Scan / Just-in-Time Compilation / Virtual Machines
ISBN9781450341356
URNurn:nbn:at:at-ubl:3-203 Persistent Identifier (URN)
DOI10.1145/2972206.2972211 
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 Das Werk ist gemäß den "Hinweisen für BenützerInnen" verfügbar
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Trace-based Register Allocation in a JIT Compiler [0.59 mb]
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Zusammenfassung (Englisch)

State-of-the-art dynamic compilers often use global approaches, like Linear Scan or Graph Coloring, for register allocation. These algorithms consider the complete compilation unit for allocation, which increases the complexity of the implementation (e.g., support for lifetime holes in Linear Scan) and potentially also affects compilation time. We propose a novel non-global algorithm, which splits a compilation unit into traces based on profiling feedback and subsequently performs register allocation within each trace individually. Traces reduce the problem size to a single linear code segment, which simplifies the problem a register allocator needs to solve. Additionally, we can apply different register allocation algorithms to each trace. We show that this non-global approach can achieve results competitive to global register allocation.

We present an implementation of Trace Register Allocation based on the Graal VM and show an evaluation for common Java benchmarks. We demonstrate that performance of this non-global approach is within 3% (on AMD64) and 1% (on SPARC) of global Linear Scan register allocation.

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